drm/i915/uc: Reserve upper range of GGTT
authorFernando Pacheco <fernando.pacheco@intel.com>
Fri, 19 Apr 2019 23:00:12 +0000 (16:00 -0700)
committerChris Wilson <chris@chris-wilson.co.uk>
Sat, 20 Apr 2019 07:19:12 +0000 (08:19 +0100)
commit911800765ef6cdcb9103da7557aa5dd9ebb4cda0
treea360b7e9273eca63a62a939cdcb1328c60abb3b2
parent95ebcda3ef4fa2c928e2e0dbe0f707ca90852110
drm/i915/uc: Reserve upper range of GGTT

GuC and HuC depend on struct_mutex for device reinitialization. Moving
away from this dependency requires perma-pinning the firmware images in
GGTT.  The upper portion of the GuC address space has a sizeable hole
(several MB) that is inaccessible by GuC. Reserve this range within GGTT
as it can comfortably hold GuC/HuC firmware images.

v2: Reserve node rather than insert (Chris)
    Simpler determination of node start/size (Daniele)
    Move reserve/release out to intel_guc.* files

v3: Reserve starting at GUC_GGTT_TOP only and bail if this
    fails (Chris)

Signed-off-by: Fernando Pacheco <fernando.pacheco@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190419230015.18121-3-fernando.pacheco@intel.com
drivers/gpu/drm/i915/i915_gem_gtt.c
drivers/gpu/drm/i915/i915_gem_gtt.h
drivers/gpu/drm/i915/intel_guc.c
drivers/gpu/drm/i915/intel_guc.h