[AArch64][SVE] Add unpredicated vector BIC ISD node
authorBradley Smith <bradley.smith@arm.com>
Fri, 30 Apr 2021 15:11:09 +0000 (16:11 +0100)
committerBradley Smith <bradley.smith@arm.com>
Fri, 14 May 2021 15:12:13 +0000 (16:12 +0100)
commit90ffcb124566eba54e50ff29f479a6adcd726ae4
tree9e6307e2e89a830fdbce24254734810b03c21991
parent3f1c218318ed2e4f37d169f1bfbb39be657dc0b4
[AArch64][SVE] Add unpredicated vector BIC ISD node

Addition of this node allows us to better utilize the different forms of
the SVE BIC instructions, including using the alias to an AND (immediate).

Differential Revision: https://reviews.llvm.org/D101831
llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.h
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/lib/Target/AArch64/SVEInstrFormats.td
llvm/test/CodeGen/AArch64/sve-intrinsics-logical-imm.ll
llvm/test/CodeGen/AArch64/sve-intrinsics-unpred-form.ll