phy: qcom-qmp-ufs: Add HS G4 mode support to SM8350 SoC
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Sat, 14 Jan 2023 07:10:07 +0000 (12:40 +0530)
committerVinod Koul <vkoul@kernel.org>
Tue, 17 Jan 2023 06:24:57 +0000 (11:54 +0530)
commit90c64cc05fd6d9d516174c6e5f0e02cc5ada9101
tree9a1334df3341d193cd06ab038dd8f2b1b96179b8
parent0d46b98d3a65c4de979073728cdf4c2ad896b767
phy: qcom-qmp-ufs: Add HS G4 mode support to SM8350 SoC

UFS PHY in SM8350 SoC is capable of operating at HS G4 mode. Hence, add the
required register settings using the tables_hs_g4 struct instance.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20230114071009.88102-11-manivannan.sadhasivam@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c