x86: chromebook_link: dts: Add PCH and LPC devices
authorSimon Glass <sjg@chromium.org>
Thu, 26 Mar 2015 15:29:29 +0000 (09:29 -0600)
committerSimon Glass <sjg@chromium.org>
Sat, 18 Apr 2015 17:11:15 +0000 (11:11 -0600)
commit90b16d1491facd55909bdeca1326766dd5d0b925
tree4452fcddff86abfc0b92d275193aa5dfb39fe8ee
parenta274e9cac55de3c8ca4e877912a260fb646df38d
x86: chromebook_link: dts: Add PCH and LPC devices

The PCH (Platform Controller Hub) is on the PCI bus, so show it as such.
The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the
right place also.

Rename the compatible strings to be more descriptive since this board is the
only user. Once we are using driver model fully on x86, these will be
dropped.

Signed-off-by: Simon Glass <sjg@chromium.org>
arch/x86/cpu/ivybridge/cpu.c
arch/x86/cpu/ivybridge/lpc.c
arch/x86/dts/chromebook_link.dts
include/fdtdec.h
lib/fdtdec.c