[mips] Fix delay slot filler so that instructions with register operand $1 are
authorAkira Hatanaka <ahatanaka@mips.com>
Fri, 16 Nov 2012 02:39:34 +0000 (02:39 +0000)
committerAkira Hatanaka <ahatanaka@mips.com>
Fri, 16 Nov 2012 02:39:34 +0000 (02:39 +0000)
commit907f5f0ca75dd7c45191ce81bd483e8198b2d4d2
tree663e259600b941b53bb82741c09d00b25b1d8dc8
parent5d38875d8173367f224570ec2b03a30e656ed60b
[mips] Fix delay slot filler so that instructions with register operand $1 are
allowed in branch delay slot.

llvm-svn: 168131
llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
llvm/test/CodeGen/Mips/brdelayslot.ll