clk: mediatek: mt8365: Convert simple_gate to mtk_gate clocks
authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Mon, 6 Mar 2023 14:05:01 +0000 (15:05 +0100)
committerStephen Boyd <sboyd@kernel.org>
Mon, 13 Mar 2023 18:50:14 +0000 (11:50 -0700)
commit905b7430d3ccc435aec6030a622e5611704cc37c
treed2d9245d86d72cbec103e3d1d503628d8688b12d
parentab44c1a70e79d37b243ba1a202d9596a7a137b9b
clk: mediatek: mt8365: Convert simple_gate to mtk_gate clocks

On this SoC some clocks apparently don't have different offsets for
set/clr/sta registers hence they can be set, cleared and status-read
on one register: this means that it was possible to use simpler gate
clocks instead of custom mtk_gate ones.

In preparation for converting this clock driver to the common probe
mechanism for MediaTek clocks, perform a conversion from simple_gate
to mtk_gate clocks since the latter does provide implicit support
for simple gate clocks as well.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20230306140543.1813621-13-angelogioacchino.delregno@collabora.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/mediatek/clk-mt8365.c