PCI: dwc: Fix scheduling while atomic issues
authorJisheng Zhang <Jisheng.Zhang@synaptics.com>
Thu, 20 Sep 2018 21:32:52 +0000 (16:32 -0500)
committerBjorn Helgaas <bhelgaas@google.com>
Thu, 20 Sep 2018 21:36:20 +0000 (16:36 -0500)
commit9024143e700f89d74b8cdaf316a3499d74fc56fe
tree21b380d0e4f4b0088a076d0c40be1fe975531ab0
parentb3027b7746ce1e5a9429715ee6492aca2a6e4cf0
PCI: dwc: Fix scheduling while atomic issues

When programming the inbound/outbound ATUs, we call usleep_range() after
each checking PCIE_ATU_ENABLE bit. Unfortunately, the ATU programming
can be executed in atomic context:

inbound ATU programming could be called through
pci_epc_write_header()
  =>dw_pcie_ep_write_header()
    =>dw_pcie_prog_inbound_atu()

outbound ATU programming could be called through
pci_bus_read_config_dword()
  =>dw_pcie_rd_conf()
    =>dw_pcie_prog_outbound_atu()

Fix this issue by calling mdelay() instead.

Fixes: f8aed6ec624f ("PCI: dwc: designware: Add EP mode support")
Fixes: d8bbeb39fbf3 ("PCI: designware: Wait for iATU enable")
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
[lorenzo.pieralisi@arm.com: commit log update]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
drivers/pci/controller/dwc/pcie-designware.c
drivers/pci/controller/dwc/pcie-designware.h