media: ccs-pll: Add support for DDR OP system and pixel clocks
authorSakari Ailus <sakari.ailus@linux.intel.com>
Mon, 24 Aug 2020 22:06:26 +0000 (00:06 +0200)
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Mon, 7 Dec 2020 16:03:56 +0000 (17:03 +0100)
commit900c33e86e4b53e96e6ea10e9737870e03911a66
tree8dff709510edc0705b6368f05058a6fccf46cf94
parentb41f270841f85b9b4f8530b9f2020ff3ba1cfec5
media: ccs-pll: Add support for DDR OP system and pixel clocks

Add support for dual data rate operational system and pixel clocks. This
is implemented using two PLL flags.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
drivers/media/i2c/ccs-pll.c
drivers/media/i2c/ccs-pll.h