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author	Vitaly Buka <vitalybuka@google.com>
	Wed, 26 Jul 2023 22:41:17 +0000 (15:41 -0700)
committer	Tobias Hieta <tobias@hieta.se>
	Mon, 7 Aug 2023 13:48:34 +0000 (15:48 +0200)
commit	8ff26437cfd37a3611d3b6066e5aa2cf933887e0
tree	eac272494b3aee85f32b7bbd660999aabd875654	tree \| snapshot
parent	34cf263e6149a0e13cbcba35d1017624e59ed996	commit \| diff

Revert "[CodeGen]Allow targets to use target specific COPY instructions for live range splitting"

And dependent commits.

Details in D150388.

This reverts commit 825b7f0ca5f2211ec3c93139f98d1e24048c225c.
This reverts commit 7a98f084c4d121244ef7286bc6503b6a181d446e.
This reverts commit b4a62b1fa546312d882fa12dfdcd015177d66826.
This reverts commit b7836d856206ec39509d42529f958c920368166b.

No conflicts in the code, few tests had conflicts in autogenerated CHECKs:
llvm/test/CodeGen/Thumb2/mve-float32regloops.ll
llvm/test/CodeGen/AMDGPU/fix-frame-reg-in-custom-csr-spills.ll

Reviewed By: alexfh

Differential Revision: https://reviews.llvm.org/D156381

(cherry picked from commit a496c8be6e638ae58bb45f13113dbe3a4b7b23fd)

106 files changed:

llvm/include/llvm/CodeGen/TargetInstrInfo.h		diff \| blob \| history
llvm/lib/CodeGen/CalcSpillWeights.cpp		diff \| blob \| history
llvm/lib/CodeGen/InlineSpiller.cpp		diff \| blob \| history
llvm/lib/CodeGen/LiveRangeEdit.cpp		diff \| blob \| history
llvm/lib/CodeGen/LiveRangeShrink.cpp		diff \| blob \| history
llvm/lib/CodeGen/RegAllocGreedy.cpp		diff \| blob \| history
llvm/lib/CodeGen/SplitKit.cpp		diff \| blob \| history
llvm/lib/CodeGen/SplitKit.h		diff \| blob \| history
llvm/lib/CodeGen/TargetInstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/AMDGPU.h		diff \| blob \| history
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/CMakeLists.txt		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIFrameLowering.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIInstrInfo.h		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIInstructions.td		diff \| blob \| history
llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp	[deleted file]	blob \| history
llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIRegisterInfo.h		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/assert-align.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/amdpal-callable.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/bf16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/call-alias-register-usage0.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/call-alias-register-usage2.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/call-alias-register-usage3.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/call-argument-types.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/collapse-endcf.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/extend-wwm-virt-reg-liveness.mir	[deleted file]	blob \| history
llvm/test/CodeGen/AMDGPU/fix-frame-reg-in-custom-csr-spills.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/fold-reload-into-exec.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/fold-reload-into-m0.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/indirect-call.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llc-pipeline.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/nested-calls.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll	[deleted file]	blob \| history
llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/sgpr-regalloc-flags.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/sgpr-spill-dead-frame-in-dbg-value.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/sgpr-spill-fi-skip-processing-stack-arg-dbg-value.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/sgpr-spill-partially-undef.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/sgpr-spill-vmem-large-frame.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/si-spill-sgpr-stack.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/sibling-call.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/snippet-copy-bundle-regression.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/spill-sgpr-to-virtual-vgpr.mir	[deleted file]	blob \| history
llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr-update-regscavenger.ll	[deleted file]	blob \| history
llvm/test/CodeGen/AMDGPU/spill-writelane-vgprs.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/spill192.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/spill224.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/spill288.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/spill320.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/spill352.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/spill384.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/stack-realign.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/swdev380865.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/vgpr-spill-placement-issue61083.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/vgpr_constant_to_sgpr.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/wave32.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll	[deleted file]	blob \| history
llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll	[deleted file]	blob \| history
llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/wwm-reserved.ll		diff \| blob \| history
llvm/test/CodeGen/MIR/AMDGPU/stack-id-assert.mir		diff \| blob \| history
llvm/test/CodeGen/Mips/madd-msub.ll		diff \| blob \| history
llvm/test/CodeGen/X86/GlobalISel/add-ext.ll		diff \| blob \| history
llvm/test/CodeGen/X86/dagcombine-cse.ll		diff \| blob \| history
llvm/test/CodeGen/X86/fold-and-shift-x86_64.ll		diff \| blob \| history
llvm/test/CodeGen/X86/unfold-masked-merge-scalar-constmask-lowhigh.ll		diff \| blob \| history

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