x86/ibt,entry: Sprinkle ENDBR dust
authorPeter Zijlstra <peterz@infradead.org>
Tue, 8 Mar 2022 15:30:24 +0000 (16:30 +0100)
committerPeter Zijlstra <peterz@infradead.org>
Tue, 15 Mar 2022 09:32:35 +0000 (10:32 +0100)
commit8f93402b92d443573d310250efa0b7f352fec992
tree11266084433c7e14a33df1318ebfb82e5357a5f1
parent5b2fc51576eff811a614e33cbbd0c3cb05022892
x86/ibt,entry: Sprinkle ENDBR dust

Kernel entry points should be having ENDBR on for IBT configs.

The SYSCALL entry points are found through taking their respective
address in order to program them in the MSRs, while the exception
entry points are found through UNWIND_HINT_IRET_REGS.

The rule is that any UNWIND_HINT_IRET_REGS at sym+0 should have an
ENDBR, see the later objtool ibt validation patch.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@redhat.com>
Link: https://lore.kernel.org/r/20220308154317.933157479@infradead.org
arch/x86/entry/entry_64.S
arch/x86/entry/entry_64_compat.S
arch/x86/include/asm/idtentry.h
arch/x86/include/asm/segment.h
arch/x86/kernel/head_64.S
arch/x86/kernel/idt.c