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(parent: 3deff86) | patch
[X86][SSE] Lower ICMP EQ(AND(X,C),C) -> SRA(SHL(X,LOG2(C)),BW-1) iff C is power-of-2.
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 18 Apr 2019 09:58:59 +0000 (09:58 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 18 Apr 2019 09:58:59 +0000 (09:58 +0000)
commit8f87e53462a652921acd0c36c3fc96427ee44932
treea62946d887d4beebad0af087352e04ea75883c25tree | snapshot
parent3deff86657c8a479c4c5d2fdd12c49a75293a8e1commit | diff
[X86][SSE] Lower ICMP EQ(AND(X,C),C) -> SRA(SHL(X,LOG2(C)),BW-1) iff C is power-of-2.

This replaces the MOVMSK combine introduced at D52121/rL342326

(movmsk (setne (and X, (1 << C)), 0)) -> (movmsk (X << C))

with the more general icmp lowering so it can pick up more cases through bitcasts - notably vXi8 cases which use vXi16 shifts+masks, this patch can remove the mask and use pcmpgtb(0,x) for the sra.

Differential Revision: https://reviews.llvm.org/D60625

llvm-svn: 358651
llvm/lib/Target/X86/X86ISelLowering.cpp diff | blob | history
llvm/test/CodeGen/X86/movmsk-cmp.ll diff | blob | history
Domain: System / Toolchain;