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(parent: dddfc51) | patch
Remove hard coded registers in ARM ldrexd and strexd instructions
authorWeiming Zhao <weimingz@codeaurora.org>
Fri, 16 Nov 2012 21:55:34 +0000 (21:55 +0000)
committerWeiming Zhao <weimingz@codeaurora.org>
Fri, 16 Nov 2012 21:55:34 +0000 (21:55 +0000)
commit8f56f88661598f556fa646462e2f2b26ba4e2ce8
tree491d71958a74d940fce3b8476fb483835f67f1e8tree | snapshot
parentdddfc513973815b7c8aabf270b9c45da7ac74c01commit | diff
Remove hard coded registers in ARM ldrexd and strexd instructions

This patch replaces the hard coded GPR pair [R0, R1] of
Intrinsic:arm_ldrexd and [R2, R3] of Intrinsic:arm_strexd with
even/odd GPRPair reg class.
Similar to the lowering of atomic_64 operation.

llvm-svn: 168207
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp diff | blob | history
llvm/lib/Target/ARM/ARMISelLowering.cpp diff | blob | history
llvm/lib/Target/ARM/ARMInstrInfo.td diff | blob | history
llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp diff | blob | history
llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp diff | blob | history
llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h diff | blob | history
llvm/test/CodeGen/ARM/atomic-64bit.ll diff | blob | history
llvm/utils/TableGen/EDEmitter.cpp diff | blob | history
Domain: System / Toolchain;