fsl_esdhc: fix PIO mode transfers
authorIra Snyder <iws@ovro.caltech.edu>
Fri, 23 Dec 2011 08:30:40 +0000 (08:30 +0000)
committerAndy Fleming <afleming@freescale.com>
Mon, 9 Jan 2012 03:28:28 +0000 (21:28 -0600)
commit8eee2bd7f484c4933c4e3112c3c3db886ac945ca
treeaf4e09bdd1926cc3b42dd7b8afc38b9f2cb65554
parentbf83662ba3a8586e52d3cfee1d82d5e06b61eefc
fsl_esdhc: fix PIO mode transfers

The pointer to the registers used to control the Freescale ESDHC MMC
controller is not initialized correctly when using PIO mode. This is
fixed by initializing the pointer in the same way as all other sites
within the driver.

Examining the commit history shows that this was broken at introduction
due to a code change in upstream U-Boot to support the mx51 processor
family.

Reported-by: Jim Lentz <JLentz@zhone.com>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
drivers/mmc/fsl_esdhc.c