i965_drv_video/encode: offset for coded buffer
authorXiang, Haihao <haihao.xiang@intel.com>
Tue, 26 Apr 2011 05:26:38 +0000 (13:26 +0800)
committerXiang, Haihao <haihao.xiang@intel.com>
Tue, 26 Apr 2011 08:10:08 +0000 (16:10 +0800)
commit8ea71178ade8ea2076ace283bc2d957a45eda6f6
tree2f1c720853ae9e82ccb045e43db999d118657ed2
parent6136b5e9ae9d884a190d37008ce6c21b78d54bd2
i965_drv_video/encode: offset for coded buffer

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
gen6_mfc.c
gen6_mfc.h