Re-commit: r309094 [globalisel][tablegen] Fuse the generated tables together.
authorDaniel Sanders <daniel_l_sanders@apple.com>
Thu, 27 Jul 2017 11:03:45 +0000 (11:03 +0000)
committerDaniel Sanders <daniel_l_sanders@apple.com>
Thu, 27 Jul 2017 11:03:45 +0000 (11:03 +0000)
commit8e82af2be6bdad01577ee23a971fd296da942400
tree61ae389730d7dea1fae37c6234932bbba2f2ac4c
parent32e267538439699b09d66ce1514c2744c8256c0f
Re-commit: r309094 [globalisel][tablegen] Fuse the generated tables together.

Summary:
Now that we have control flow in place, fuse the per-rule tables into a
single table. This is a compile-time saving at this point. However, this will
also enable the optimization of a table so that similar instructions can be
tested together, reducing the time spent on the matching the code.

This is NFC in terms of externally visible behaviour but some internals have
changed slightly. State.MIs is no longer reset between each rule that is
attempted because it's not necessary to do so. As a consequence of this the
restriction on the order that instructions are added to State.MIs has been
relaxed to only affect recorded instructions that require new elements to be
added to the vector. GIM_RecordInsn can now write to any element from 1 to
State.MIs.size() instead of just State.MIs.size().

The compile-time regressions from the last commit were caused by the ARM target
including a non-const variable (zero_reg) in the table and therefore generating
an initializer for it. That variable is now const.

Reviewers: ab, t.p.northover, qcolombet, rovka, aditya_nandakumar

Reviewed By: rovka

Subscribers: kristof.beyls, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D35681

llvm-svn: 309264
llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
llvm/lib/Target/ARM/ARMInstructionSelector.cpp
llvm/test/TableGen/GlobalISelEmitter.td
llvm/utils/TableGen/GlobalISelEmitter.cpp