Merge branch irq/misc-5.18 into irq/irqchip-next
authorMarc Zyngier <maz@kernel.org>
Fri, 4 Mar 2022 14:37:32 +0000 (14:37 +0000)
committerMarc Zyngier <maz@kernel.org>
Fri, 4 Mar 2022 14:37:32 +0000 (14:37 +0000)
commit8e6958c80ead0f9891c9db6f64841050f63785ba
tree9b8aeb14167d1a4a7c7f8cc81cfbbcff17dacfcb
parent92877b9e7433c5fb98d31c18af6e873509be1f2e
parent1e364921b0085780153b1d03640ca41e1be83e8b
Merge branch irq/misc-5.18 into irq/irqchip-next

* irq/misc-5.18:
  : .
  : Misc irq chip changes for 5.18
  :
  : - GICv3: Relax ordering of previous stores to only include the ISH domain
  :
  : - nvic: Unmap MMIo region on probe failure
  :
  : - xilinx: Switch to GENERIC_IRQ_MULTI_HANDLER when used on microblaze
  : .
  irqchip/xilinx: Switch to GENERIC_IRQ_MULTI_HANDLER
  irqchip/nvic: Release nvic_base upon failure
  irqchip/gic-v3: Use dsb(ishst) to order writes with ICC_SGI1R_EL1 accesses

Signed-off-by: Marc Zyngier <maz@kernel.org>