media: ov2680: Add support for 19.2 MHz clock
authorHans de Goede <hdegoede@redhat.com>
Thu, 3 Aug 2023 09:33:30 +0000 (11:33 +0200)
committerMauro Carvalho Chehab <mchehab@kernel.org>
Mon, 14 Aug 2023 18:27:56 +0000 (20:27 +0200)
commit8e50a1221f89136e9a3c2bcff22c38b376b730cb
tree7dcce69978d0d0baa100f72fae13cfde2b0fb5c3
parentec7dfad51ff0ba3a90f95466a2af1949f3208c4e
media: ov2680: Add support for 19.2 MHz clock

Most x86/ACPI boards use the ov2680 with a 19.2 MHz xvclk,
rather then the expected 24MHz, add support for this.

Compensate for the lower clk by setting a higher PLL multiplier
of 69 when using 19.2 MHz vs the default multiplier of 55 for
a 24MHz xvclk.

Acked-by: Rui Miguel Silva <rmfrfs@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
drivers/media/i2c/ov2680.c