drm/msm/disp/dpu: wait for extra vsync till timing engine status is disabled
authorVinod Polimera <quic_vpolimer@quicinc.com>
Thu, 2 Mar 2023 16:33:09 +0000 (22:03 +0530)
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Mon, 13 Mar 2023 01:43:49 +0000 (04:43 +0300)
commit8e1ff4bb629fe482a53c6d942182f42ba0427bed
tree2f03038f7189a603137c4bdc6e22733fabfa02aa
parente3969eadc8ee78a5bdca65b8ed0a421a359e4090
drm/msm/disp/dpu: wait for extra vsync till timing engine status is disabled

There can be a race between timing gen disable and vblank irq. The
wait post timing gen disable may return early but intf disable sequence
might not be completed. Ensure that, intf status is disabled before
we retire the function.

Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/524727/
Link: https://lore.kernel.org/r/1677774797-31063-7-git-send-email-quic_vpolimer@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c