ARM: 9007/1: l2c: fix prefetch bits init in L2X0_AUX_CTRL using DT values
authorGuillaume Tucker <guillaume.tucker@collabora.com>
Tue, 1 Sep 2020 15:58:06 +0000 (16:58 +0100)
committerRussell King <rmk+kernel@armlinux.org.uk>
Tue, 15 Sep 2020 13:35:53 +0000 (14:35 +0100)
commit8e007b367a59bcdf484c81f6df9bd5a4cc179ca6
tree49640d95902b61739bccfc27daca94834ed44cda
parentc03e41470e90112328e5a3dcc6961a07e87b8141
ARM: 9007/1: l2c: fix prefetch bits init in L2X0_AUX_CTRL using DT values

The L310_PREFETCH_CTRL register bits 28 and 29 to enable data and
instruction prefetch respectively can also be accessed via the
L2X0_AUX_CTRL register.  They appear to be actually wired together in
hardware between the registers.  Changing them in the prefetch
register only will get undone when restoring the aux control register
later on.  For this reason, set these bits in both registers during
initialisation according to the devicetree property values.

Link: https://lore.kernel.org/lkml/76f2f3ad5e77e356e0a5b99ceee1e774a2842c25.1597061474.git.guillaume.tucker@collabora.com/
Fixes: ec3bd0e68a67 ("ARM: 8391/1: l2c: add options to overwrite prefetching behavior")
Signed-off-by: Guillaume Tucker <guillaume.tucker@collabora.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
arch/arm/mm/cache-l2x0.c