drm/i915/perf: fix ICL perf register offsets
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>
Mon, 10 Jun 2019 08:19:14 +0000 (11:19 +0300)
committerLionel Landwerlin <lionel.g.landwerlin@intel.com>
Tue, 25 Jun 2019 11:03:05 +0000 (14:03 +0300)
commit8dcfdfb4501012a8d36d2157dc73925715f2befb
tree55f89dd916ade91322a4654c146a05f105339a60
parentf9a393875d3af13cc3267477746608dadb7f17c1
drm/i915/perf: fix ICL perf register offsets

We got the wrong offsets (could they have changed?). New values were
computed off an error state by looking up the register offset in the
context image as written by the HW.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 1de401c08fa805 ("drm/i915/perf: enable perf support on ICL")
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20190610081914.25428-1-lionel.g.landwerlin@intel.com
drivers/gpu/drm/i915/i915_perf.c