i386: Optimize vpblendvb on inverted mask register to vpblendvb on swapping the order...
authorliuhongt <hongtao.liu@intel.com>
Wed, 7 Apr 2021 01:58:54 +0000 (09:58 +0800)
committerliuhongt <hongtao.liu@intel.com>
Wed, 12 May 2021 11:44:13 +0000 (19:44 +0800)
commit8da3b309d8fb3ddec0b42218ca6762967b402dc3
treeb07758da01613401f008e289e65c6b7daab62cd3
parentcd36bbb2281ada10b5e1df143ecf64b88cdb8119
i386: Optimize vpblendvb on inverted mask register to vpblendvb on swapping the order of operand 1 and operand 2. [PR target/99908]

-       vpcmpeqd        %ymm3, %ymm3, %ymm3
-       vpandn  %ymm3, %ymm2, %ymm2
-       vpblendvb       %ymm2, %ymm1, %ymm0, %ymm0
+       vpblendvb       %ymm2, %ymm0, %ymm1, %ymm0

gcc/ChangeLog:

PR target/99908
* config/i386/sse.md (<sse4_1_avx2>_pblendvb): Add
splitters for pblendvb of NOT mask register.

gcc/testsuite/ChangeLog:

PR target/99908
* gcc.target/i386/avx2-pr99908.c: New test.
* gcc.target/i386/sse4_1-pr99908.c: New test.
gcc/config/i386/sse.md
gcc/testsuite/gcc.target/i386/avx2-pr99908.c [new file with mode: 0644]
gcc/testsuite/gcc.target/i386/sse4_1-pr99908.c [new file with mode: 0644]