projects / platform / upstream / llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 4f93b8b) | patch
[X86] Disable combineConcatVectors for vXi1 vectors.
authorCraig Topper <craig.topper@intel.com>
Thu, 18 Jul 2019 06:18:06 +0000 (06:18 +0000)
committerCraig Topper <craig.topper@intel.com>
Thu, 18 Jul 2019 06:18:06 +0000 (06:18 +0000)
commit8da0402210232ba439493bf197865835fbf0600e
treea331691d3a0b41944bc8ba73d339d9a8c7158415tree | snapshot
parent4f93b8b56f5982d19b8b55b8c575887c17e15588commit | diff
[X86] Disable combineConcatVectors for vXi1 vectors.

I'm not convinced the code this calls is properly vetted for
vXi1 vectors. Experimental vector widening legalization testing
for D55251 is now hitting an assertion failure inside
EltsFromConsecutiveLoads. This is occurring from a v2i1 load
having a store size different than its VT size. Hopefully
this commit will keep such issues from happening.

llvm-svn: 366405
llvm/lib/Target/X86/X86ISelLowering.cpp diff | blob | history
llvm/test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll diff | blob | history
Domain: System / Toolchain;