projects / platform / upstream / mesa.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 0e0e23e) | patch
i965/cs: Implement brw_emit_gpgpu_walker
authorJordan Justen <jordan.l.justen@intel.com>
Thu, 28 Aug 2014 21:47:19 +0000 (14:47 -0700)
committerJordan Justen <jordan.l.justen@intel.com>
Sat, 2 May 2015 07:50:00 +0000 (00:50 -0700)
commit8d87070af295140fb3558b6784dc6303fde11a67
tree0ba2aa56c39f61348a148c41ded1b8908fe99115tree | snapshot
parent0e0e23ef537c9add672ff322f34e129a07edc55ecommit | diff
i965/cs: Implement brw_emit_gpgpu_walker

Tested on Ivybridge, Haswell and Broadwell.

v2:
 * Use SET_FIELD. (Ken)
 * Use simd_size / 16 to support SIMD8/16/32. Ken suggested
   that we might be able to do it arithmetically rather than just
   supporting SIMD8 and SIMD16 with a conditional.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/brw_compute.c diff | blob | history
src/mesa/drivers/dri/i965/brw_defines.h diff | blob | history
Domain: Graphics System / GL;