anv: refactor to fix pipe control debugging
authorTapani Pälli <tapani.palli@intel.com>
Tue, 19 Sep 2023 06:35:16 +0000 (09:35 +0300)
committerMarge Bot <emma+marge@anholt.net>
Wed, 20 Sep 2023 06:04:37 +0000 (06:04 +0000)
commit8d2dcd55d78cff504304e2c7aa8b76526c8be36b
tree7f68cb8e14b8dea6d5e1a52e3f99a4f6d3329ded
parent747c7042df9149ab0934fda2bb708b482e91dafb
anv: refactor to fix pipe control debugging

While earlier changes to pipe control emission allowed debug dump of
each pipe control, they also changed debug output to almost always print
same reason/function for each pc. These changes fix the output so that
we print the original function name where pc is emitted.

As example:

pc: emit PC=( +depth_flush +rt_flush +pb_stall +depth_stall ) reason: gfx11_batch_emit_pipe_control_write
pc: emit PC=( ) reason: gfx11_batch_emit_pipe_control_write

changes back to:

pc: emit PC=( +depth_flush +rt_flush +pb_stall +depth_stall ) reason: gfx11_emit_apply_pipe_flushes
pc: emit PC=( ) reason: cmd_buffer_emit_depth_stencil

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25282>
src/intel/vulkan/anv_genX.h
src/intel/vulkan/genX_cmd_buffer.c
src/intel/vulkan/genX_cmd_draw_generated_indirect.h
src/intel/vulkan/genX_gfx_state.c
src/intel/vulkan/genX_gpu_memcpy.c
src/intel/vulkan/genX_init_state.c
src/intel/vulkan/genX_query.c