Handle sparc compare-and-branch

Handle sparc compare-and-branch

SPARC-T4 adds a "compare and branch" instruction which fuses
a compare and a branch instruction into one.  The branch
is non-delayed, there are no anulling facilities, and the
displacement is 10-bits.

This also corrects the existing bit test for Branch on
Integer Register.  The distinguising characteristic between
Branch on Integer Register and Compare-and-Branch is bit
28.  The existing code was checking bit 24 for zero, but
that's pointless because bit 24 is already covered by
the "X_OP2 (insn) == 3" test.

gdb/

	* sparc-tdep.c (X_DISP10): Define.
	(sparc_analyze_control_transfer): Handle compare-and-branch.