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(parent: 25d23b1) | patch
[RISCV] Lower interleave and deinterleave intrinsics
authorLuke Lau <luke@igalia.com>
Mon, 20 Feb 2023 13:32:13 +0000 (13:32 +0000)
committerLuke Lau <luke@igalia.com>
Thu, 23 Feb 2023 16:23:02 +0000 (16:23 +0000)
commit8d15e7275fe104520af0805b432681445c5196ea
treeb33ee7cba9f370149a4a24380f6e27c3e9b377ebtree | snapshot
parent25d23b1970ea023d83d462402fd43038b41c13a3commit | diff
[RISCV] Lower interleave and deinterleave intrinsics

Lower the two intrinsics introduced in D141924.

These intrinsics can be combined with loads and stores into the much more efficient segmented load and store instructions in a following patch.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D144092
llvm/lib/Target/RISCV/RISCVISelLowering.cpp diff | blob | history
llvm/lib/Target/RISCV/RISCVISelLowering.h diff | blob | history
llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll [new file with mode: 0644] blob
Domain: System / Toolchain;