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(parent: 320250e) | patch
[RISCV] Remove redundant test cases for index segment load (3/8).
authorHsiangkai Wang <kai.wang@sifive.com>
Fri, 19 Feb 2021 03:07:42 +0000 (11:07 +0800)
committerHsiangkai Wang <kai.wang@sifive.com>
Fri, 19 Feb 2021 03:56:08 +0000 (11:56 +0800)
commit8cc0b1cbea7d7ef89a950d709654555ec6949136
tree905d26cd1752b6ad2b49ef429dc299b2459a2558tree | snapshot
parent320250e4865756545b4187a74faac656120c678bcommit | diff
[RISCV] Remove redundant test cases for index segment load (3/8).

Differential Revision: https://reviews.llvm.org/D97022
llvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll diff | blob | history
Domain: System / Toolchain;