[DAGCombine][X86][AArch64][AMDGPU] (x - y) + -1 -> add (xor y, -1), x fold
authorRoman Lebedev <lebedev.ri@gmail.com>
Tue, 28 May 2019 17:54:13 +0000 (17:54 +0000)
committerRoman Lebedev <lebedev.ri@gmail.com>
Tue, 28 May 2019 17:54:13 +0000 (17:54 +0000)
commit8c9b3e4e4a6b4c22293e13e81bee497e182ddd87
treee8f84c121e3fd94f21570b6841ac785e67e9eb03
parent6a24c9b9abd0f0f46161a93aa908ce4b32190db8
[DAGCombine][X86][AArch64][AMDGPU] (x - y) + -1  ->  add (xor y, -1), x  fold

Summary:
This prevents regressions in next patch,
and somewhat recovers from the regression to AMDGPU test in D62223.

It is indeed not great that we leave vector decrement,
don't transform it into vector add all-ones..

https://rise4fun.com/Alive/ZRl

Reviewers: RKSimon, craig.topper, spatel, arsenm

Reviewed By: RKSimon, arsenm

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, javed.absar, dstuttard, tpr, t-tye, kristof.beyls, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62263

llvm-svn: 361855
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/test/CodeGen/AArch64/xor.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
llvm/test/CodeGen/X86/xor.ll