review.tizen.org Git - platform/upstream/llvm.git/commit

author	Alex Bradbury <asb@lowrisc.org>
	Thu, 9 Nov 2017 15:00:03 +0000 (15:00 +0000)
committer	Alex Bradbury <asb@lowrisc.org>
	Thu, 9 Nov 2017 15:00:03 +0000 (15:00 +0000)
commit	8c345c5aa903b67bdf43394f05205a09c50f6dce
tree	43678bf3965f191557dade2b8254ea1a286198d9	tree \| snapshot
parent	89d31658e5601c8a9a7737db64e239c1efcc5d6b	commit \| diff

[RISCV] MC layer support for the standard RV32A instruction set extension

llvm-svn: 317791

llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp		diff \| blob \| history
llvm/lib/Target/RISCV/RISCV.td		diff \| blob \| history
llvm/lib/Target/RISCV/RISCVInstrFormats.td		diff \| blob \| history
llvm/lib/Target/RISCV/RISCVInstrInfo.td		diff \| blob \| history
llvm/lib/Target/RISCV/RISCVInstrInfoA.td	[new file with mode: 0644]	blob
llvm/lib/Target/RISCV/RISCVSubtarget.h		diff \| blob \| history
llvm/test/MC/RISCV/rv32a-invalid.s	[new file with mode: 0644]	blob
llvm/test/MC/RISCV/rv32a-valid.s	[new file with mode: 0644]	blob
llvm/test/MC/RISCV/rv32i-invalid.s		diff \| blob \| history

Domain: System / Toolchain;