spi: img-spfi: Control CS lines with GPIO
authorEzequiel Garcia <ezequiel.garcia@imgtec.com>
Wed, 8 Apr 2015 17:03:16 +0000 (10:03 -0700)
committerMark Brown <broonie@kernel.org>
Wed, 8 Apr 2015 20:04:51 +0000 (21:04 +0100)
commit8c2c8c03cdcb9b0a75b5585e611715fdd8096c38
tree87bfe4fa8dd103b80559e44e94d07bba39aced88
parenta25202b04f17830dbf241a24838f8c8575a56611
spi: img-spfi: Control CS lines with GPIO

When the CONTINUE bit is set, the interrupt status we are polling to
identify if a transaction has finished can be sporadic.  Even though
the transfer has finished, the interrupt status may erroneously
indicate that there is still data in the FIFO.  This behaviour causes
random timeouts in large PIO transfers.

Instead of using the CONTINUE bit to control the CS lines, use the SPI
core's CS GPIO handling.  Also, now that the CONTINUE bit is not being
used, we can poll for the ALLDONE interrupt to indicate transfer
completion.

Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Documentation/devicetree/bindings/spi/spi-img-spfi.txt
drivers/spi/spi-img-spfi.c