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(parent: 9299525) | patch
drm/amd/pm: add PWR_CKS_CNTL setting
authorEvan Quan <evan.quan@amd.com>
Thu, 18 Jun 2020 08:28:02 +0000 (16:28 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 27 Oct 2020 15:58:01 +0000 (11:58 -0400)
commit8c23cc29d55bf0d81620492dd8fddbe751a1ae6a
tree431ed846297dcfcc1f2897be6667a1729d2c25f9tree | snapshot
parent92995254afae9016e1d4d27ad9d1efcb2784cd29commit | diff
drm/amd/pm: add PWR_CKS_CNTL setting

This is for some special Polaris10 ASICs.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c diff | blob | history
Domain: System / Kernel;