[SPIR-V] Remove switch G_ICMP+G_BRCOND+G_BR before ISel
authorMichal Paszkowski <michal.paszkowski@outlook.com>
Sun, 26 Mar 2023 18:07:11 +0000 (20:07 +0200)
committerMichal Paszkowski <michal.paszkowski@outlook.com>
Tue, 4 Apr 2023 21:50:07 +0000 (23:50 +0200)
commit8bfb2b6d771ce1aa817b621bc922c1ab92eda034
tree769476d12224a2560de048a3edffa503fcc3609e
parentf56b5921d3954cbd99175d0df44030e7782bc456
[SPIR-V] Remove switch G_ICMP+G_BRCOND+G_BR before ISel

IRTranslator lowers switches to [G_SUB] + G_ICMP + G_BRCOND + G_BR
sequences. Since values and destination MBBs are included in the
spv_switch intrinsics, the sequences are not needed for ISel.

Before this commit, the information decoded by these sequences were
added to spv_switch intrinsics in SPIRVPreLegalizer and the sequences
were kept until SPIRVModuleAnalysis where they were marked skipped for
emission.

After this commit, the [G_SUB] + G_ICMP + G_BRCOND + G_BR sequences
and MBBs containing only these MIs are erased in SPIRVPreLegalizer.

Differential Revision: https://reviews.llvm.org/D146923
llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.h
llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
llvm/test/CodeGen/SPIRV/branching/OpSwitch32.ll [moved from llvm/test/CodeGen/SPIRV/transcoding/OpSwitch32.ll with 100% similarity]
llvm/test/CodeGen/SPIRV/branching/OpSwitch64.ll [moved from llvm/test/CodeGen/SPIRV/transcoding/OpSwitch64.ll with 100% similarity]
llvm/test/CodeGen/SPIRV/branching/OpSwitchBranches.ll [new file with mode: 0644]
llvm/test/CodeGen/SPIRV/branching/OpSwitchChar.ll [moved from llvm/test/CodeGen/SPIRV/transcoding/OpSwitchChar.ll with 100% similarity]
llvm/test/CodeGen/SPIRV/branching/OpSwitchEmpty.ll [moved from llvm/test/CodeGen/SPIRV/transcoding/OpSwitchEmpty.ll with 100% similarity]
llvm/test/CodeGen/SPIRV/branching/OpSwitchUnreachable.ll [moved from llvm/test/CodeGen/SPIRV/transcoding/OpSwitchUnreachable.ll with 100% similarity]
llvm/test/CodeGen/SPIRV/branching/Two_OpSwitch_same_register.ll [moved from llvm/test/CodeGen/SPIRV/transcoding/Two_OpSwitch_same_register.ll with 100% similarity]