i965/fs: Implement lowering of logical texturing opcodes on Gen7+.
authorFrancisco Jerez <currojerez@riseup.net>
Mon, 13 Jul 2015 15:08:51 +0000 (18:08 +0300)
committerFrancisco Jerez <currojerez@riseup.net>
Wed, 29 Jul 2015 11:12:48 +0000 (14:12 +0300)
commit8be01e3548bdd900b7cadb5c9a77e52b01151cfe
tree180c18276c94495215c1b31129cf133e2811c301
parenta69332a31243a7733dab926b765964ba6df827b2
i965/fs: Implement lowering of logical texturing opcodes on Gen7+.

This should be largely equivalent to emit_texture_gen7() except that
we now get i965 sampling opcodes directly rather than
ir_texture_opcode enum values.  The mapping is as follows:

 - ir_tex -> SHADER_OPCODE_TEX
 - ir_txb -> FS_OPCODE_TXB
 - ir_txl -> SHADER_OPCODE_TXL
 - ir_txd -> SHADER_OPCODE_TXD
 - ir_txf -> SHADER_OPCODE_TXF
 - ir_txf_ms -> SHADER_OPCODE_TXF_CMS
 - ir_txs -> SHADER_OPCODE_TXS
 - ir_query_levels -> SHADER_OPCODE_TXS too, the visitor will make
                      sure that the provided lod value is zero in this
                      case.
 - ir_lod -> SHADER_OPCODE_LOD
 - ir_tg4 -> SHADER_OPCODE_TG4_OFFSET if the offset value is not
             immediate, SHADER_OPCODE_TG4 otherwise.

Other than that there are only minor changes and style fixes like the
implementation now being factored out in static functions to improve
encapsulation.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/brw_fs.cpp