[AMDGPU] Do not reserve 16-bit registers
authorJay Foad <jay.foad@amd.com>
Wed, 29 Mar 2023 14:11:08 +0000 (15:11 +0100)
committerJay Foad <jay.foad@amd.com>
Fri, 31 Mar 2023 13:56:27 +0000 (14:56 +0100)
commit8bad806f298c4ddc476c708ece0664e21924ba41
treece55ead5af7cf3fb007e59540f378256b1d71f2b
parent8d2899acbcf1b8ce120bc219aeb30207d4422042
[AMDGPU] Do not reserve 16-bit registers

There should be no need to reserve all SGPR hi16/lo16 halves, or all
AGPR hi16 halves. This should be done by marking the corresponding
register classes as not allocatable instead.

Differential Revision: https://reviews.llvm.org/D147158
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
llvm/lib/Target/AMDGPU/SIRegisterInfo.td