drm/i915/guc: Fix confused register capture list creation
authorJohn Harrison <John.C.Harrison@Intel.com>
Fri, 12 May 2023 01:35:44 +0000 (18:35 -0700)
committerJohn Harrison <John.C.Harrison@Intel.com>
Fri, 12 May 2023 18:05:19 +0000 (11:05 -0700)
commit8ba3ba992fc2e456f4211ac4dc80dcb7775e722f
tree3fbcb6a5f046d3e1f9fd528474da1fe4f455441c
parentdb2ce1ab0508cd95efb4be938a146472c56c9461
drm/i915/guc: Fix confused register capture list creation

The GuC has a completely separate engine class enum when referring to
register capture lists, which combines render and compute. The driver
was using the 'normal' GuC specific engine class enum instead. That
meant that it thought it was defining a capture list for compute
engines, the list was actually being applied to the GSC engine. And if
a platform didn't have a render engine, then it would get no compute
register captures at all.

Fix that.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230512013544.3367606-1-John.C.Harrison@Intel.com
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h