X86: Decode opcode 0x82 as opcode 0x80 in 32-bit mode
authorH.J. Lu <hjl.tools@gmail.com>
Thu, 3 Nov 2016 16:13:01 +0000 (09:13 -0700)
committerH.J. Lu <hjl.tools@gmail.com>
Thu, 3 Nov 2016 16:15:52 +0000 (09:15 -0700)
commit8b89fe14b522cd6e5d160ff17defa8ecec243b11
treea9cd182a09e9fb3c0c8ecf3c269684633f98feed
parent722bcb33bf0383487c1af0e7d401e30301e94e2b
X86: Decode opcode 0x82 as opcode 0x80 in 32-bit mode

Update x86 disassembler to treat opcode 0x82 as an aliase of opcode 0x80
in 32-bit mode.

gas/

PR binutils/20754
* testsuite/gas/i386/opcode.s: Add tests for opcode 0x82.
* testsuite/gas/i386/opcode-intel.d: Updated.
* testsuite/gas/i386/opcode.d: Likewise.

opcodes/

PR binutils/20754
* i386-dis.c (REG_82): New.
(X86_64_82_REG_0): Likewise.
(X86_64_82_REG_1): Likewise.
(X86_64_82_REG_2): Likewise.
(X86_64_82_REG_3): Likewise.
(X86_64_82_REG_4): Likewise.
(X86_64_82_REG_5): Likewise.
(X86_64_82_REG_6): Likewise.
(X86_64_82_REG_7): Likewise.
(dis386): Use REG_82.
(reg_table): Add REG_82.
(x86_64_table): Add X86_64_82_REG_0, X86_64_82_REG_1,
X86_64_82_REG_2, X86_64_82_REG_3, X86_64_82_REG_4,
X86_64_82_REG_5, X86_64_82_REG_6 and X86_64_82_REG_7.
gas/ChangeLog
gas/testsuite/gas/i386/opcode-intel.d
gas/testsuite/gas/i386/opcode.d
gas/testsuite/gas/i386/opcode.s
opcodes/ChangeLog
opcodes/i386-dis.c