MIPS: Provide actually relaxed MMIO accessors
authorMaciej W. Rozycki <macro@linux-mips.org>
Mon, 8 Oct 2018 00:37:23 +0000 (01:37 +0100)
committerPaul Burton <paul.burton@mips.com>
Tue, 9 Oct 2018 17:44:29 +0000 (10:44 -0700)
commit8b656253a7a4526f413f6b5ad0b03e11daa1d62d
treed95f1b05680681dfb63c43250611810ae3f351f6
parent3d474dacae72ac0f28228b328cfa953b05484b7f
MIPS: Provide actually relaxed MMIO accessors

Improve performance for the relevant systems and remove the DMA ordering
barrier from `readX_relaxed' and `writeX_relaxed' MMIO accessors, where
it is not needed according to our requirements[1].  For consistency make
the same arrangement with low-level port I/O accessors, but do not
actually provide any accessors making use of it.

References:

[1] "LINUX KERNEL MEMORY BARRIERS", Documentation/memory-barriers.txt,
    Section "KERNEL I/O BARRIER EFFECTS"

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/20865/
Cc: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/io.h