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clk: renesas: r8a779g0: Add CSI-2 clocks
authorNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Sat, 11 Feb 2023 14:36:53 +0000 (15:36 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 6 Mar 2023 09:42:14 +0000 (10:42 +0100)
commit8b406fd422d568a407a98c2809c0b2c6bdc95be3
tree2c986a217a3ae218ce116768e04f88c81f22cf77tree | snapshot
parent7502a04dae0e614bc14553e31461e50499bc67aacommit | diff
clk: renesas: r8a779g0: Add CSI-2 clocks

Add the CSI core clock and the CSI40 and CSI41 module clocks, which are
used by the CSI-2 Interfaces on the Renesas R-Car V4H (R8A779G0) SoC.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230211143655.3809756-2-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a779g0-cpg-mssr.c diff | blob | history
Domain: System / Kernel;