net: stmmac: ensure that the MSS desc is the last desc to set the own bit
authorNiklas Cassel <niklas.cassel@axis.com>
Mon, 26 Feb 2018 21:47:06 +0000 (22:47 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 30 May 2018 05:52:37 +0000 (07:52 +0200)
commit8a6be540377410b5f17f53612674112bc93d80b0
treec0d40e1cddf801c439fb6e84015dce424f6d28ce
parenta3d4c34cdea992e137bed4cf66c03e2db6a324ec
net: stmmac: ensure that the MSS desc is the last desc to set the own bit

[ Upstream commit 15d2ee42a3087089e73ad52fd8c1b37ab496b87c ]

A dma_wmb() is used to guarantee the ordering, with respect to
other writes, to cache coherent DMA memory.

There is a dma_wmb() in prepare_tx_desc()/prepare_tso_tx_desc() which
ensures that TDES0/1/2 is written before TDES3 (which contains the own
bit), for First Desc.

However, in the rare case that MSS changes, there will be a MSS
context descriptor in front of the regular DMA descriptors:

<MSS desc> <- DMA Next Descriptor
<First Desc>
<desc n>
<Last Desc>

Thus, for this special case, we need a dma_wmb()
after prepare_tso_tx_desc()/before writing the own bit to the MSS desc,
so that we flush the write to TDES3 for First Desc,
in order to ensure that the MSS descriptor is the last descriptor to
set the own bit.

Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c