[Xtensa 4/10] Add basic *td files with Xtensa architecture description
authorAndrei Safronov <andrei.safronov@espressif.com>
Mon, 26 Dec 2022 10:49:11 +0000 (11:49 +0100)
committerstefan.stipanovic <stefan.stipanovic@espressif.com>
Mon, 26 Dec 2022 12:30:51 +0000 (13:30 +0100)
commit8a6552016c97ae3c1e4fe6d18a1f5ac43a4a44c1
tree009f6e2d7a8427ea44eb0a56713e488dac91f6d3
parent52804a7f22a20e020caacb71571e0cca712f0a12
[Xtensa 4/10] Add basic *td files with Xtensa architecture description

Add initial Xtensa.td file with target machine description. Add XtensaInstrInfo.td,
currently describe just susbet of Core Instructions like ALU, Processor control,
memory barrier and some move instructions. Add descriptions of the instructions
formats(XtensaInstrInfo.td) and some immediate instruction operands(XtensaOperands.td).
Add General Registers and Special Registers classes.

Differential Revision: https://reviews.llvm.org/D64830
llvm/lib/Target/Xtensa/CMakeLists.txt
llvm/lib/Target/Xtensa/Xtensa.td [new file with mode: 0644]
llvm/lib/Target/Xtensa/XtensaInstrFormats.td [new file with mode: 0644]
llvm/lib/Target/Xtensa/XtensaInstrInfo.td [new file with mode: 0644]
llvm/lib/Target/Xtensa/XtensaOperands.td [new file with mode: 0644]
llvm/lib/Target/Xtensa/XtensaRegisterInfo.td [new file with mode: 0644]