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(parent: c514a94) | patch
sifive: dts: fu540: Add DDR controller and phy register settings
authorPragnesh Patel <pragnesh.patel@sifive.com>
Fri, 29 May 2020 06:03:27 +0000 (11:33 +0530)
committerAndes <uboot@andestech.com>
Thu, 4 Jun 2020 01:44:08 +0000 (09:44 +0800)
commit8a3fd8440f9447754602912b52256c0bedd43d3d
treeee0243f1ec4ac7a7412d124f6ae51185c905360atree | snapshot
parentc514a94abf5aa997508ba072b90318ec10655193commit | diff
sifive: dts: fu540: Add DDR controller and phy register settings

Add DDR controller and phy register settings, taken from fsbl
(https://github.com/sifive/freedom-u540-c000-bootloader.git)

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
arch/riscv/dts/fu540-hifive-unleashed-a00-ddr.dtsi [new file with mode: 0644] blob
Domain: System / Kernel;