[AArch64][SVE] Add support for spilling/filling ZPR2/3/4
authorCullen Rhodes <cullen.rhodes@arm.com>
Thu, 28 May 2020 09:37:55 +0000 (09:37 +0000)
committerCullen Rhodes <cullen.rhodes@arm.com>
Thu, 28 May 2020 10:02:57 +0000 (10:02 +0000)
commit8a397b66b2c672999e9e6d63334d5bffd7db1a3f
treed918a53ff09493a5ce98335f28e89b17ee26750e
parentc010d4d195506aaea76a1cc8afb5a6b5884dba44
[AArch64][SVE] Add support for spilling/filling ZPR2/3/4

Summary:
This patch enables the register allocator to spill/fill lists of 2, 3
and 4 SVE vectors registers to/from the stack. This is implemented with
pseudo instructions that get expanded to individual LDR_ZXI/STR_ZXI
instructions in AArch64ExpandPseudoInsts.

Patch by Sander de Smalen.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D75988
llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/test/CodeGen/AArch64/spillfill-sve.mir