drm/amd/display: fix YUV surface address programming sequence
authorTony Cheng <tony.cheng@amd.com>
Thu, 18 May 2017 23:03:15 +0000 (19:03 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 26 Sep 2017 22:07:26 +0000 (18:07 -0400)
commit89c872e595c48ccf357bbabcc9918bdef9de7ac8
tree0754a0d3d25ac21e216c342599c5c977fe9f5a28
parent83dc211702cb18e62741379fef48f2629b1c983c
drm/amd/display: fix YUV surface address programming sequence

need to program DCSURF_PRIMARY_SURFACE_ADDRESS last as HW automatically
latch rest of addr regs on write when SURFACE_UPDATE_LOCK is not used

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.c