drm/amd/display: update dcn315 clk table read
authorDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Fri, 8 Apr 2022 14:10:04 +0000 (10:10 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 25 Apr 2022 21:06:16 +0000 (17:06 -0400)
commit89c342a9661838b9afe3988418705f877f496928
tree93801b1b0839ef5e50f821d39a6fd466e365bfb6
parent259f249c4b9b2a9dc15095afd071bcc5b8d6f30e
drm/amd/display: update dcn315 clk table read

Clean up the sequence by making sure clk_mgr always builds a
reasonable clock table regardless of what we read from smu
by moving all defaults from resource soc struct to clk_mgr.

Now the only thing resource soc update does is read
the clock table and apply any DC specific policy decisions
to how clocks are populated in dml soc.

Reviewed-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h