drm/i915/glk: Reuse broxton's cdclk code for GLK
authorAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Fri, 2 Dec 2016 08:23:54 +0000 (10:23 +0200)
committerAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Fri, 2 Dec 2016 14:42:00 +0000 (16:42 +0200)
commit89b3c3c7ee9d9be319b90af3d52f00feba04f1d8
treea64286b8de69cfe36c679fbc6268c57fc09fd0a8
parentf7044dd904d7a97967af097515da272fa89b00e9
drm/i915/glk: Reuse broxton's cdclk code for GLK

Geminilake has the same register layout, reference clock and programming
sequence as broxton. The difference is that it doesn't support the 1.5
divider and has different ratios, but a lot of code can be shared
between the two platforms.

v2: Rebase (s/broxton/bxt).

v3: Fix vco calculation in glk_de_pll_vco().

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1480667037-11215-7-git-send-email-ander.conselvan.de.oliveira@intel.com
drivers/gpu/drm/i915/intel_display.c