[AArch64] Define ETE and TRBE system registers
authorMomchil Velikov <momchil.velikov@arm.com>
Fri, 26 Jul 2019 09:19:08 +0000 (09:19 +0000)
committerMomchil Velikov <momchil.velikov@arm.com>
Fri, 26 Jul 2019 09:19:08 +0000 (09:19 +0000)
commit898d953693ff96accd816f481d87f3b33021b73d
treebb8914a018a0319b828b624bae8d62ffaa52f8f0
parentd0164fc5258472229faad82bef14506289479d27
[AArch64] Define ETE and TRBE system registers

Embedded Trace Extension and Trace Buffer Extension are optional
future architecture extensions.
(cf. https://developer.arm.com/architectures/cpu-architecture/a-profile/exploration-tools)

Their system registers are documented here:
https://developer.arm.com/docs/ddi0601/a

ETE shares register names with ETM. One exception is the ETE
TRCEXTINSELR0 register, which has the same encoding as the ETM
TRCEXTINSELR register (but different semantics). This patch treats
them as aliases: the assembler will accept both names, emitting
identical encoding, and the disassembler will keep disassembling
to TRCEXRINSELR.

Differential Revision: https://reviews.llvm.org/D63707

llvm-svn: 367093
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/lib/Target/AArch64/AArch64Subtarget.h
llvm/lib/Target/AArch64/AArch64SystemOperands.td
llvm/test/MC/AArch64/ete-sysregs.s [new file with mode: 0644]
llvm/test/MC/AArch64/trbe-sysreg-diag.s [new file with mode: 0644]
llvm/test/MC/AArch64/trbe-sysreg.s [new file with mode: 0644]
llvm/test/MC/Disassembler/AArch64/ete.txt [new file with mode: 0644]
llvm/test/MC/Disassembler/AArch64/trbe.txt [new file with mode: 0644]