author | jacquesguan <Jianjian.Guan@streamcomputing.com> | |
Sat, 15 Jan 2022 06:28:37 +0000 (14:28 +0800) | ||
committer | jacquesguan <Jianjian.Guan@streamcomputing.com> | |
Thu, 24 Mar 2022 07:26:08 +0000 (15:26 +0800) | ||
commit | 8910ac400c4de81bde8ca388142500e2d440276c | |
tree | ae014a3483c19be0641cbd58353d876bc11409c8 | tree | snapshot |
parent | 1c13bbdde630b8716f817989a33ccc77a588642c | commit | diff |
llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td | diff | blob | history | |
llvm/test/CodeGen/RISCV/rvv/vwmul-sdnode.ll | [new file with mode: 0644] | blob |