drm/tegra: nvdec: Fix TRANSCFG register offset
authorMikko Perttunen <mperttunen@nvidia.com>
Mon, 27 Jun 2022 14:19:52 +0000 (17:19 +0300)
committerThierry Reding <treding@nvidia.com>
Fri, 8 Jul 2022 14:27:52 +0000 (16:27 +0200)
commit88c0292f023da4e4753a271430a36a66e6fb974f
treed61a8eb6da20e624c550a6e6fbbc42b295b52c89
parente078d8d6c3849019b927edb5beeca38dea00050c
drm/tegra: nvdec: Fix TRANSCFG register offset

NVDEC's TRANSCFG register is at a different offset than VIC.
This becomes a problem now when context isolation is enabled and
the reset value of the register is no longer sufficient.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/gpu/drm/tegra/nvdec.c