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[AArch64] Combine SELECT_CC patterns that match smin(a,0) and smax(a,0)
authorCameron McInally <cmcinally@nvidia.com>
Fri, 14 Apr 2023 16:26:16 +0000 (09:26 -0700)
committerCameron McInally <cmcinally@nvidia.com>
Fri, 14 Apr 2023 16:50:36 +0000 (09:50 -0700)
commit88b80760bce47288bb639a61869cc2eab569333a
treee59117047ed03741e95fa39d4cbf7d52491b638btree | snapshot
parent411dd47dbf80ebac347051136a4026c5549bce90commit | diff
[AArch64] Combine SELECT_CC patterns that match smin(a,0) and smax(a,0)

With a previous patch to canonicalize SPF to min/max intrinsics (a266af721153),
we saw a performance regression on the AArch64 backend.

This patch recovers from the SPF canonicalization by combining smin(a,0) and
smax(a,0) SELECT_CC patterns during AArch64ISelLowering.

GitHub Issue: #61767

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D148249
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp diff | blob | history
llvm/test/CodeGen/AArch64/fpclamptosat.ll diff | blob | history
llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll diff | blob | history
llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll diff | blob | history
llvm/test/CodeGen/AArch64/min-max-combine.ll [new file with mode: 0644] blob
Domain: System / Toolchain;