clk: microchip: mpfs: fix periph clk parentage
authorConor Dooley <conor.dooley@microchip.com>
Tue, 25 Oct 2022 07:58:47 +0000 (08:58 +0100)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Tue, 15 Nov 2022 07:37:17 +0000 (15:37 +0800)
commit88b697fb37432b95bd87525e718726607bdb2123
treeb406040e16430ac1a14adc107b4f518847328d28
parent32cfdd51630506393ca078aa36fa70248d549109
clk: microchip: mpfs: fix periph clk parentage

Not all "periph" clocks are children of the AHB clock, some have the AXI
clock as their parent & the mtimer clock is derived from the external
reference clock directly. Stop assuming the AHB clock to be the parent
of all "periph" clocks and define their correct parents instead.

Fixes: 2f27c9219e ("clk: Add Microchip PolarFire SoC clock driver")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Tested-by: Padmarao Begari <padmarao.begari@microchip.com>
drivers/clk/microchip/mpfs_clk.c
drivers/clk/microchip/mpfs_clk.h
drivers/clk/microchip/mpfs_clk_periph.c